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Although a simple formula can be directly employed to calculate maximum current carrying capacity, practical cases are not that simple and direct. That's because apart from cross-sectional area and temperature rise, trace current carrying capacity also depends on other elements such as number of components, pad and vias.
For traces with many pads distributed, the tinning trace will perform an extremely higher capacity than ordinary traces. It's not a rare condition in which engineers meet circuit boards on which some trace between pads is burned down as a large current is flowing through. The reason for such tragedy lies in too much solder paste on components or pins leads to an increased cross-sectional area while no modification occurs to trace between pads. As a result, as soon as power starts or order modification is implemented on trace, it's possible to cause a super large transient surge or even burning down of a trace between pads.
One of the solutions to this issue lies in trace width increasing. When a trace isn't allowed to be widened, solder mask can be applied on traces that tend to be burned down and solder paste should be printed in SMT (Surface Mount Technology) procedure. After reflow soldering, trace width will rise so that current carrying capacity will go up as well.
In one word, though PCB trace current carrying capacity can be obtained by table provided by IPC or a formula, they are only applied for straight trace calculation. However, dust or contaminant pollution has to be taken into careful consideration in real printed circuit fabrication or assembly because pollution will possibly lead partial traces broken. Thus, when we are designing maximum current carrying capacity in either way, a security factor has to be added to prohibit overloading issue from taking place.
Moreover, special attention has to be paid to turning traces. If an acute angle takes place in a trace, non-smooth transfer will possibly be caused, which perhaps leads to little influence on small current or trace with high width. But when it comes to low current carrying capacity, issues may take place.
Although a simple formula can be directly employed to calculate maximum current carrying capacity, practical cases are not that simple and direct. That's because apart from cross-sectional area and temperature rise, trace current carrying capacity also depends on other elements such as number of components, pad and vias.
For traces with many pads distributed, the tinning trace will perform an extremely higher capacity than ordinary traces. It's not a rare condition in which engineers meet circuit boards on which some trace between pads is burned down as a large current is flowing through. The reason for such tragedy lies in too much solder paste on components or pins leads to an increased cross-sectional area while no modification occurs to trace between pads. As a result, as soon as power starts or order modification is implemented on trace, it's possible to cause a super large transient surge or even burning down of a trace between pads.
One of the solutions to this issue lies in trace width increasing. When a trace isn't allowed to be widened, solder mask can be applied on traces that tend to be burned down and solder paste should be printed in SMT (Surface Mount Technology) procedure. After reflow soldering, trace width will rise so that current carrying capacity will go up as well.
In one word, though PCB trace current carrying capacity can be obtained by table provided by IPC or a formula, they are only applied for straight trace calculation. However, dust or contaminant pollution has to be taken into careful consideration in real printed circuit fabrication or assembly because pollution will possibly lead partial traces broken. Thus, when we are designing maximum current carrying capacity in either way, a security factor has to be added to prohibit overloading issue from taking place.
Moreover, special attention has to be paid to turning traces. If an acute angle takes place in a trace, non-smooth transfer will possibly be caused, which perhaps leads to little influence on small current or trace with high width. But when it comes to low current carrying capacity, issues may take place.
